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? semiconductor components industries, llc, 2006 august, 2006 ? rev. 2 1 publication order number: MMDFS2P102/d MMDFS2P102 power mosfet 2 amps, 20 volts p ? channel so ? 8, fetky the fetky product family incorporates low r ds(on) , true logic level mosfets packaged with industry leading, low forward drop, low leakage schottky barrier rectifiers to offer high efficiency components in a space saving configuration. independent pinouts for mosfet and schottky die allow the flexibility to use a single component for switching and rectification functions in a wide variety of applications such as buck converter, buck ? boost, synchronous rectification, low voltage motor control, and load management in battery packs, chargers, cell phones and other portable products. ? power mosfet with low v f , low i r schottky rectifier ? lower component placement and inventory costs along with board space savings ? logic level gate drive ? can be driven by logic ics ? mounting information for so ? 8 package provided ? i dss specified at elevated temperature ? applications information provided mosfet maximum ratings (t j = 25 c unless otherwise noted) (note 1.) rating symbol value unit drain ? to ? source voltage v dss 20 vdc drain ? to ? gate voltage (r gs = 1.0 m ) v dgr 20 vdc gate ? to ? source voltage ? continuous v gs 20 vdc drain current (note 3.) ? continuous @ t a = 25 c ? continuous @ t a = 100 c ? single pulse (tp 10 s) i d i d i dm 3.3 2.1 20 adc apk total power dissipation @ t a = 25 c (note 2.) p d 2.0 watts single pulse drain ? to ? source avalanche energy ? starting t j = 25 c v dd = 30 vdc, v gs = 5.0 vdc, v ds = 20 vdc, i l = 9.0 apk, l = 10 mh, r g = 25 e as 324 mj 1. negative sign for p ? channel device omitted for clarity. 2. pulse test: pulse width 250 s, duty cycle 2.0%. 3. mounted on 2 square fr4 board (1 sq. 2 oz. cu 0.06 thick single sided), 10 sec. max. anode 1 2 3 4 8 7 6 5 top view anode source gate cathode cathode drain drain device package shipping ordering information MMDFS2P102r2 so ? 8 2500 tape & reel http://onsemi.com d s g p ? channel so ? 8 case 751 style 18 lyww marking diagram 2p102 l = location code y = year ww = work week pin assignment 1 8 2 amperes 20 volts r ds(on) = 160 m v f = 0.39 volts
MMDFS2P102 http://onsemi.com 2 schottky rectifier maximum ratings (t j = 25 c unless otherwise noted) peak repetitive reverse voltage dc blocking voltage v rrm v r 20 volts average forward current (note 1) (rated v r ) t a = 100 c i o 1.0 amps peak repetitive forward current (note 3.) (rated v r , square wave, 20 khz) t a = 105 c i frm 2.0 amps non ? repetitive peak surge current (surge applied at rated load conditions, halfwave, single phase, 60 hz) i fsm 20 amps thermal characteristics ? schottky and mosfet thermal resistance ? junction ? to ? ambient (note 2) ? mosfet r ja 167 c/w thermal resistance ? junction ? to ? ambient (note 3) ? mosfet r ja 100 thermal resistance ? junction ? to ? ambient (note 3.) ? mosfet r ja 62.5 thermal resistance ? junction ? to ? ambient (note 2) ? schottky r ja 204 thermal resistance ? junction ? to ? ambient (note 3) ? schottky r ja 122 thermal resistance ? junction ? to ? ambient (note 1) ? schottky r ja 83 operating and storage temperature range t j , t stg ? 55 to 150 1. mounted on 2 square fr4 board (1 sq. 2 oz. cu 0.06 thick single sided), 10 sec. max. 2. mounted with minimum recommended pad size, pc board fr4. 3. mounted on 2 square fr4 board (1 sq. 2 oz. cu 0.06 thick single sided), steady state.
MMDFS2P102 http://onsemi.com 3 mosfet electrical characteristics (t j = 25 c unless otherwise noted) (note 4) characteristic symbol min typ max unit off characteristics drain ? source voltage (v gs = 0 vdc, i d = 0.25 ma) temperature coefficient (positive) v (br)dss 20 ? ? 25 ? ? vdc mv/ c zero gate drain current (v ds = 30 vdc, v gs = 0 vdc) (v ds = 20 vdc, v gs = 0 vdc, t j = 125 c) i dss ? ? ? ? 1.0 10 adc gate body leakage current (v gs = 20 vdc, v ds = 0) i gss ? ? 100 nadc on characteristics (note 5) gate threshold voltage (v ds = v gs , i d = 0.25 ma) temperature coefficient (negative) v gs(th) 1.0 ? 1.5 4.0 2.0 ? vdc mv/ c static drain ? source resistance (v gs = 10 vdc, i d = 2.0 adc) (v gs = 4.5 vdc, i d = 2.5 adc) r ds(on) ? ? 0.118 0.152 0.160 0.180 ohms forward transconductance (v ds = 3.0 vdc, i d = 1.0 adc) g fs 2.0 3.0 ? mhos dynamic characteristics input capacitance (v ds = 16 vdc, v gs = 0 vdc, f = 1.0 mhz) c iss ? 420 588 pf output capacitance c oss ? 290 406 reverse transfer capacitance c rss ? 116 232 switching characteristics (note 6) turn ? on delay time (v ds = 10 vdc, i d = 2.0 adc, v gs = 4.5 vdc, r g = 6.0 ) t d(on) ? 19 38 ns rise time t r ? 66 132 turn ? off delay time t d(off) ? 25 50 fall time t f ? 37 74 gate charge (v ds = 16 vdc, i d = 2.0 adc, v gs = 10 vdc) q t ? 15 20 nc q 1 ? 1.2 ? q 2 ? 5.0 ? q 3 ? 4.0 ? drain source diode characteristics forward on ? voltage (note 5) (i s = 2.0 adc, v gs = 0 vdc) v sd ? 1.5 2.1 v reverse recovery time (i s = 2.0 adc, v dd = 15 v, dis/dt = 100 a/ s) t rr ? 38 ? ns t a ? 17 ? t b ? 21 ? reverse recovery stored charge q rr ? 0.034 ? c schottky rectifier electrical characteristics (t j = 25 c unless otherwise noted) maximum instantaneous forward voltage (note 5) i f = 1.0 a i f = 2.0 a v f t j = 25 c t j = 125 c volts 0.47 0.58 0.39 0.53 maximum instantaneous reverse current (note 5) v r = 20 v i r t j = 25 c t j = 125 c ma 0.05 10 maximum voltage rate of change v r = 20 v dv/dt 10,000 v/ s 4. negative sign for p ? channel device omitted for clarity. 5. pulse test: pulse width 300 sec, duty cycle 2.0%. 6. switching characteristics are independent of operating temperature.
MMDFS2P102 http://onsemi.com 4 typical fet electrical characteristics figure 1. on ? region characteristics figure 2. transfer characteristics figure 3. on ? resistance versus gate ? to ? source voltage figure 4. on ? resistance versus drain current and gate voltage figure 5. on ? resistance variation with temperature figure 6. drain ? to ? source leakage current versus voltage 1.2 0 v ds , drain?to?source voltage (volts) 4.0 3.0 2.0 v gs , gate?to?source voltage (volts) 3.5 1.0 3.0 2.0 1.0 0 8.0 10 0 v gs , gate?to?source voltage (volts) 0.6 0.4 0.3 0.2 0.1 0 i d , drain current (amps) 0.5 0 0.20 0.16 0.12 0.08 0.04 1.0 ?25 25 ?50 t j , junction temperature ( c) 1.2 0.8 0.6 v ds , drain?to?source voltage (volts) 5.0 20 0 100 1.0 15 0 i d , drain current (amps) i r 1.0 0 0.6 0.2 0.4 0.8 1.0 1.4 1.6 1.5 2.0 2.5 3.0 4.0 2.0 4.0 6.0 1.5 2.0 2.5 3.0 3.5 4.0 , drain?to?source resistance (normalized) r ds(on) 50 100 75 1.0 10 10 i dss , leakage (na) 1.8 , drain current (amps) d , drain?to?source resistance (ohms) ds(on) 0.5 r , drain?to?source resistance (ohms) ds(on) 125 150 1.4 1.6 v gs = 10 v i d = 2.0 a v gs = 0 v t j = 125 c 100 c t j = 25 c v gs = 4.5 v 10 v t j = 25 c i d = 1.0 a v ds 10 v t j = ? 55 c 100 c 25 c t j = 25 c 3.1 v v gs = 2.4 v 10 v 4.5 v 3.8 v
MMDFS2P102 http://onsemi.com 5 typical fet electrical characteristics mounted on 2 sq. fr4 board (1 sq. 2 oz. cu 0.06 thick single sided) with one die operating, 10 s max. figure 7. capacitance variation figure 8. gate ? to ? source and drain ? to ? source voltage versus total charge figure 9. resistive switching time variation versus gate resistance figure 10. diode forward voltage versus current figure 11. maximum rated forward biased safe operating area figure 12. maximum avalanche energy versus starting junction temperature 5.0 20 ?10 gate?to?source or drain?to?source voltage (volts) 1200 800 1000 600 q g , total gate charge (nc) 16 0 6.0 4.0 2.0 0 100 1.0 r g , gate resistance (ohms) 1000 100 10 v sd , source?to?drain voltage (volts) 0.5 2.0 1.6 1.2 0.8 0.4 0 0.7 0.1 v ds , drain?to?source voltage (volts) 0.1 0.01 t j , starting junction temperature ( c) 50 150 25 350 300 50 0 1.0 c, capacitance (pf) v 400 200 0 ?5.0 0 10 4.0 8.0 12 12 10 0.9 1.1 1.3 1.5 , drain current (amps) i d 10 1.0 75 100 125 100 e as , single pulse drain?to?source 15 , gate?to?source voltage (volts) gs t, time (ns) i , source current (amps) s 100 10 100 10 8.0 150 200 250 avalanche energy (mj) i d = 6.0 a v ds = 0 v gs = 0 t j = 25 c v gs = 0 v t j = 25 c c iss c iss c oss c rss c rss i d = 2.0 a t j = 25 c v ds v gs q t q2 q1 q3 t d(off) t d(on) t r t f r ds(on) limit thermal limit package limit dc 10 ms 1.0 ms 100 s 10 s v gs = 20 v single pulse t c = 25 c v gs v ds 0 18 16 14 12 10 8.0 6.0 4.0 2.0
MMDFS2P102 http://onsemi.com 6 typical fet electrical characteristics figure 13. fet thermal response figure 14. diode reverse recovery waveform di/dt t rr t a t p i s 0.25 i s time i s t b t, time (s) rthja(t), effective transient thermal response 1.0 0.1 0.001 d = 0.5 single pulse 1.0e?05 1.0e?04 1.0e?03 1.0e?02 1.0e?01 1.0e+00 1.0e+01 0.2 0.1 0.05 0.02 0.01 1.0e+02 1.0e+03 0.0001 0.01 normalized to r ja at steady state (1 pad) chip junction 0.0175 0.0154 f 0.0710 0.0854 f 0.2706 0.3074 f 0.5776 1.7891 f 0.7086 107.55 f ambient typical schottky electrical characteristics t j = 125 c figure 15. typical forward voltage figure 16. maximum forward voltage 0.7 1.0 0.1 v f , instantaneous forward voltage (volts) 10 1.0 v f , maximum instantaneous forward voltage (volts) 1.4 0 1.0 0.1 i f , instantaneous forward current (amps) 0.1 0.4 0.2 0.3 0.5 0.6 0.8 0.9 0.2 0.4 0.6 0.8 10 i f , instantaneous forward current (amps) 1.0 1.2 85 c 25 c ?40 c t j = 125 c 25 c 85 c
MMDFS2P102 http://onsemi.com 7 typical schottky electrical characteristics figure 17. typical reverse current figure 18. maximum reverse current figure 19. typical capacitance figure 20. current derating figure 21. forward power dissipation 15 20 0 v r , reverse voltage (volts) 1e?2 1e?4 1e?3 1e?5 15 20 0 v r , reverse voltage (volts) 1000 100 10 t a , ambient temperature ( c) 20 0 1.6 0.8 0.6 0.4 0.2 0 40 0 i o , average forward current (amps) 0.5 0.4 0.3 0.2 0.1 0 0.5 i r , reverse current (amps) 1e?6 1e?7 5.0 10 5.0 10 60 80 100 120 140 160 , average power dissipation (watts) p fo 1.0 1.5 c, capacitance (pf) i , average forward current (amps) o 2.0 0.6 0.7 15 20 0 v r , reverse voltage (volts) 1e?1 1e?3 1e?2 1e?4 i r , maximum reverse current (amps) 1e?5 1e?6 5.0 10 1.0 1.2 1.4 square wave dc i pk /i o = 5.0 i pk /i o = i pk /i o = 10 i pk /i o = 20 typical capacitance at 0 v = 170 pf t j = 125 c 25 c t j = 125 c 25 c 85 c freq = 20 khz dc square wave i pk /i o = 5.0 i pk /i o = i pk /i o = 10 i pk /i o = 20
MMDFS2P102 http://onsemi.com 8 typical schottky electrical characteristics figure 22. schottky thermal response t, time (s) rthja(t), effective transient thermal resistance 1.0 0.1 d = 0.5 single pulse 1.0e?05 1.0e?04 1.0e?03 1.0e?02 1.0e?01 1.0e+00 1.0e+01 0.2 0.1 0.05 0.02 0.01 1.0e+02 1.0e+03 0.001 0.01 normalized to r ja at steady state (1 pad) chip junction 0.0031 0.0014 f 0.0154 0.0082 f 0.1521 0.1052 f 0.4575 2.7041 f 0.3719 158.64 f ambient typical applications load v out c o + ? v in + ? load v out c o + ? v in + ? l o l o step down switching regulators buck regulator synchronous buck regulator
MMDFS2P102 http://onsemi.com 9 typical applications load v out c o + ? v in + ? load v out c o + ? v in + ? step up switching regulators boost regulator buck ? boost regulator l1 q1 v in + ? multiple battery chargers batt #1 batt #2 d2 d3 q2 q3 buck regulator/charger c o l o q1 d1
MMDFS2P102 http://onsemi.com 10 typical applications li ? lon battery pack applications battery pack discharge charge smart ic li?ion battery cells pack + pack ? schottky schottky q1 q2 ? applicable in battery packs which require a high current level. ? during charge cycle q2 is on and q1 is off. schottky can reduce power loss during fast charge. ? during discharge q1 is on and q2 is off. again, schottky can reduce power dissipation. ? under normal operation, both transistors are on. mm inches 0.060 1.52 0.275 7.0 0.024 0.6 0.050 1.270 0.155 4.0 so ? 8 footprint
MMDFS2P102 http://onsemi.com 11 package dimensions style 18: pin 1. anode 2. anode 3. source 4. gate 5. drain 6. drain 7. cathode 8. cathode seating plane 1 4 5 8 n j x 45 k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0 8 0 8 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 ? x ? ? y ? g m y m 0.25 (0.010) ? z ? y m 0.25 (0.010) z s x s m xxxxxx alyw so ? 8 case 751 ? 07 issue v on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 MMDFS2P102/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative fetky is a trademark of international rectifier corporation.

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